CogniGron Seminar by Bernabé Linares-Barranco on "Hardware for Neuromorphic Sensing, Processing and Learning"

Seminar abstract

We will briefly give an overview of vision with Dynamic Vision Sensor (DVS) cameras, processing with spiking-based hardware processing modules, and link it with emerging nanoscale synaptic-like devices which can exploit on-line bio-inspired learning. DVS cameras are frame-free strongly bio-inspired vision sensors that result in highly energy efficient visual information encoding, very well suited for processing with spiking neural networks. We will present techniques to process such signals with spiking neural network hardware that can be modularly expanded to scaled-up systems. Spike Timing Dependent Plasticity (STDP) is one type of learning rule for Spiking Neural Networks (SNN). We will present how STDP can be implemented by exploiting novel nano-scale memristor devices, used as synapses, whose resistance changes as correlated spiking signals appear at their terminals. We will show experimental results from a CMOS chip with 4k monolithically integrated nanoscale memristors performing spiking computation and recognition of spiking patterns.

About Prof. Bernabé Linares-Barranco
Bernabé Linares-Barranco received the B. S. degree in electronic physics in June 1986 and the M. S. degree in microelectronics in September 1987, both from the University of Seville, Spain. He received a PhD degree in 1991 from Texas A&M University, College-Station, USA.

Since June 1991, he has been a Tenured Scientist at the "Instituto de Microelectrónica deSevilla", (IMSE-CNM-CSIC) Sevilla, Spain, which since 2015 is a Mixed Center between the University of Sevilla and the Spanish Research Council (CSIC). He has been on sabbatical stays at the Johns Hopkins University, Manchester University, Lincoln University, and Texas A&M University. In January 2003 he was promoted to Tenured Researcher, and in January 2004 to Full Professor. During 2018-2022 he was the Director of the "Insitituto de Microelectrónica de Sevilla".

He has been involved with circuit design for telecommunication circuits, VLSI emulators of biological neurons, VLSI neural based pattern recognition systems, hearing aids, precision circuit design for instrumentation equipment, VLSI transistor mismatch parameters characterization, and over the past 25 years has been deeply involved with neuromorphic spiking circuits and systems, with strong emphasis on vision and exploiting nanoscale memristive devices for learning. He is co-founder of two start-ups, Prophesee SA (www.prophesee.ai) and GrAI-Matter-Labs SAS (www.graimatterlabs.ai), both on neuromorphic hardware. He is co-inventor of 9 patents, some of them licensed to Prophesee, Brainchip, or Samsung.

He has been Associate Editor for IEEE Transactions on Circuits and Systems, IEEE Transactions on Neural Networks, and Frontiers in Neuromorphic Engineering. Since Jan. 2021 he is Specialty Chief Editor of "Frontiers in Neuromorphic Engineering".

He has co-authored over 120 international journal papers, two of the receiving a Best Paper Award. He is an IEEE Fellow since January 2010. He is listed among the Stanford top 2% most world-wide cited scientist in Electrical and Electronic Engineering.